元胞化MHz高效高功率密度380V-12V DCX(2024年3月)

October 14, 2024

本工作利用低压Si器件低NFoM特性,降低串联谐振电路软开关的励磁电流,从而降低导通损耗并提升效率。采用元胞化后由于器件数量的增多,驱动损耗也相应增大,谐振驱动电路利用电感与主电路MOS管的栅极电容谐振,在管子关断时将能量由栅极电容转移至励磁电感,从而实现能量回收。对于传统UI型磁芯,磁芯高度(3mm)高于器件高度(1.5mm),从而导致空间浪费,本工作提出一种多窗口磁芯结构,将磁芯高度减半,从而提高了功率密度。在绕组方面,绕组未交叠部分会大幅增加该部分的涡流损耗,本工作通过绕组优化缩短了原边端子长度,并实现副边端子交叠,从而降低了绕组损耗,提高效率。

This work using the low NFoM character of low voltage Si device to reduce the magnetizing current of series resonant circuit. In this case, conduction loss can be reduced, while efficiency is improved. However, using cellular circuit leads to increase of the number of devices, which causes larger driving loss. By the resonance of inductance and gate capacitance, the energy of gate capacitance can be transferred to magnetizing inductance to realize energy recovery. For traditional UI core, the height of the core (3mm) is higher than device (1.5mm), which caused the waste of space, this work proposed a muti-window core structure, which can reduce the height of the core by half and increase power density. As for winding, the terminal part which is not interleaving occupies large eddy loss. By the optimization of winding, the length of primary terminal is shorten, while the secondary terminal is better interleaving. These two measures reduce the winding loss and increase efficiency.

Fig.1 Cellular series resonant circuit
Fig.2 Resonant driving circuit
(a) UI core based power transformer
(b) Muti-window core based power transformer
Fig.4 Prototype
Fig.5 Efficiency Curve

往期相关成果:基于低压器件和谐振驱动变压器的1MHz 380V-12V高效高密度DC/DC模块电源技术

Our Industry Partners