Recently, two graduate students from the ZJU-PMIC team successfully passed their thesis defenses. The two graduate students in this defense achieved innovative results in the fields of magnetic integration technology and self-powering for medium-voltage DC transformers, respectively.
Thesis Title: Research on High-Frequency Miniaturization Mechanisms of Magnetic Components and Interleaved Topologies with Multiphase Coupled Inductors
Defendant: Wang Binhao (Master’s Student)
Supervisor: Zhang Junming
Research Summary: As power electronic systems evolve toward extreme high power density, the volume and weight of magnetic components have become a major bottleneck constraining system miniaturization. Although increasing the switching frequency is a direct path to reducing the volume of magnetic components, limited by magnetic material losses and thermal design constraints, the volume reduction benefit brought by simply increasing frequency has tended to saturate. Therefore, magnetic integration technology has become a key technology for breaking through traditional design limitations and improving power density.
Using a data center 48V-12V DC-DC converter as the carrier, ZJU-PMIC studied the miniaturization mechanisms of high-frequency magnetic components, established a frequency optimization criterion under temperature rise constraints, and clarified the route to breaking through volume limits through magnetic integration. To address the difficult problem of complex winding modeling, an extended winding matrix analysis method was proposed, and an interleaved anti-saturation structure was designed, raising the saturation current threshold from 60A to 80A. To address CRM proximity effect losses, a rotating interleaved planar winding topology was proposed. Combined with a size optimization algorithm, the efficiency of a four-phase interleaved Buck platform was increased from 96.8% to 97.4%.
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Thesis Title: Research on Self-Powering Technology for Device-Series Medium-Voltage DC Transformers
Defendant: Zong Yujian (Master’s Student)
Supervisor: Shao Shuai
Research Summary:
DCT topologies based on directly series-connected silicon carbide (SiC) devices have attracted much attention due to advantages such as requiring no high-voltage power devices and offering high power density. Facing the high dv/dt common-mode interference caused by high-frequency switching of series-connected devices, self-powering technology has become an ideal solution to the challenge of power supply for floating gate drives because it requires no high-voltage isolation insulation, can effectively cut off common-mode transmission paths, and is easy to modularly expand. However, the inherent constant power load (CPL) characteristic of self-powering auxiliary power supplies (APS) introduces negative incremental resistance, leading to system instability. In particular, in small-capacitance (microfarad-level) self-powering systems pursuing high power density, asynchronous APS startup can easily induce system voltage divergence, posing severe challenges to reliable startup and stable operation of the system.
ZJU-PMIC focused on the stability mechanism and low-loss balancing technology of small-capacitance self-powering series systems. By establishing a mathematical model, the boundary constraints for system stability were quantified, and the high-loss limitations of traditional resistor balancing schemes were quantitatively revealed. To this end, a novel passive balancing circuit based on Zener diodes was proposed, which introduces positive incremental resistance while reducing static balancing losses by about 75%, and a switching strategy from low-loss passive balancing to active balancing was designed. Based on a 5kV/60kW prototype, verification showed stable operation in back-to-back testing, capacitor voltage imbalance of less than 5%, and a peak efficiency of 98.6%, validating the engineering value of the scheme.
