Packaging Integration Method for High-Power SiC Modules Based on an All-Copper Sintered Cu-CLIP Architecture

Project Overview

As the current-carrying density (>500 A/cm²) and heat flux density (more than three times that of silicon-based devices) of SiC MOSFETs significantly surpass those of silicon-based IGBTs and continue to increase, the limitations of traditional bond-wire interconnections in current-carrying capability and heat dissipation performance have become increasingly prominent, becoming a key bottleneck constraining the performance and reliability of high-power SiC modules. To overcome this limitation, this project proposes an all-copper sintered Cu-Clip integrated packaging method, aiming to fundamentally improve the electrical interconnection current-carrying capability, thermal management efficiency, and long-term operational reliability of high-power SiC modules.

Technical Achievements and Innovation Highlights

This project is the first to propose a packaging integration method for high-power SiC modules based on an all-copper sintered Cu-Clip interconnection architecture. The core innovations and process implementations are as follows: (1) System-level-to-chip-level all-low-temperature copper sintering interconnection. This method achieves low-temperature copper sintering between the heat sink and substrate at the system level, and between the substrate and chip, as well as between the chip and Cu-Clip at the chip level, constructing an all-copper vertical interconnection structure that significantly improves the module’s heat conduction and current-carrying capability; (2) Optimized low-temperature sintering process to reduce critical interface risks. By controlling the sintering temperature at 200°C and reducing the sintering pressure to 5 MPa, it effectively mitigates the risk of ceramic layer fracture in large-area active metal brazed (AMB) substrates (approximately 40×50 mm²) that is easily caused during high-pressure sintering, while avoiding the severe warpage of heat sinks caused by thermal mismatch in the traditional 250°C sintering process, achieving low-thermal-resistance, highly reliable interconnection between the substrate and heat sink; (3) Innovative low-electromigration sintered copper interconnection process on the chip front side. A sintered copper process with low electromigration characteristics is adopted on the front side of the chip to achieve electrical interconnection with high-current Cu-Clip, further improving the module’s current-carrying density and long-term reliability.

Figure 1 Schematic diagram of the all-copper sintered vertical interconnection structure

This study systematically compared the sintering behavior and mechanical properties of several typical commercial sintered silver materials under standard processes: (1) Under sintering conditions of 250°C, 15 MPa, and 5 min, the shear strength of the micro-nano hybrid paste was 90–110 MPa, that of the nano paste was 80–90 MPa, and that of the micro paste was 70–80 MPa. The results show that under the same sintering parameters, the shear strength of sintered copper can reach 135 MPa, significantly higher than that of commercial sintered silver. Further research found that sintered copper, under low-temperature 200°C and low auxiliary pressure 5 MPa conditions, can still achieve mechanical properties comparable to those of commercial micron sintered silver under high-temperature and high auxiliary pressure conditions of 250°C–15 MPa. The comparison of sintering behavior and mechanical properties of the above low-temperature silver and copper sintering materials is shown in Figures 2 and 3.

Figure 2 Sintering behavior of low-temperature silver & copper (SEM micromorphology)

Figure 3 Mechanical properties (sintered copper vs. sintered silver)

Based on the excellent performance demonstrated by sintered copper under low-temperature 200°C and low-pressure 5 MPa conditions, and to verify the potential of this technology in practical applications, this study designed and fabricated an 8-parallel SiC MOSFET half-bridge module based on an all-copper sintered Cu-CLIP interconnection architecture, and explored and verified its packaging process and preliminary electrical performance. The key copper interconnection structure and the developed module are shown in Figure 4, and the switching performance is shown in Figure 5.